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Home Q & A Board Science-Related Homework Help Engineering Electrical Engineering
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Wutwut12 Wutwut12
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6 years ago
If one input of an AND gate is HIGH while the other is a clock signal, the output is
 
  A) LOW. B) a clock signal.
  C) HIGH. D) cannot be determined
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joanneannajoanneanna
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Wutwut12 Author
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6 years ago
Thanks for your help!!
amandamraz
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This calls for a celebration Person Raising Both Hands in Celebration
shangshang
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Thanks
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